A physical design for an integrated circuit or “chip” is created through a design process. Floorplanning is a part of the chip design process in which cells or instances (integrated circuit implementation of some logical or electronic function) are positioned relative to other cells, and space is allocated for the cells. A given floorplanning often involves a balance between available space (cost of the chip), required performance, and a need to have certain cells in close proximity of other cells.
The routing for the cells (i.e., the connections or wiring between cells) associated with the physical design may be created through a custom design process or may be automatically drawn by software tools. The custom design process involves a person drawing the wires for the physical design of the chip in a layout mode. When the routing is hand drawn, changes to the design may require significant changes to the routing and thereby cause significant additional work by the person performing the drawing. Software routing, on the other hand, typically makes a number of trade-offs based on a number of factors or constraints to generate the routes for the physical design of the chip.